# A+ Exam Cram 2: Memory

This chapter is from the book

## Memory Diagnostics—Parity

Parity is the state of either oddness or evenness assigned to a given byte (not bit) of data. Parity checking is the way that the computer uses a special set of logical rules and chips to make decisions based on the parity (state) of a particular byte. When a PC runs through the POST (Power On Self-Test), commonly called a cold boot, memory integrity is one of the first things tested. On many machines you can see this taking place as a rapidly-increasing number displays on the screen before the operating system begins to load. This checking is designed to verify the accuracy (integrity) of the bits contained in memory, and it happens after every read/write operation.

CAUTION

Remember that computers think in binary bits and bytes. The binary computer language uses "words" composed of 1s and 0s.

Originally, parity checking was a major development in data protection. At the time, memory chips were nowhere near as reliable as they are today, and the process went a long way towards keeping data accurate. The parity circuit allowed the CPU to compare what it sent to main memory with what it read from main memory. Parity checking is still the most common (and least expensive) way to check whether or not a memory cell can accurately hold data. A more sophisticated (and expensive) method uses Error Correcting Code (ECC).

### Even and Odd Parity

Parity checking puts a byte into memory along with its parity bit and then reads the byte from memory. If the byte plus the parity bit matches what was sent, the memory is okay. Otherwise, we have a parity error. Parity can be set to odd, even, or off. The parity circuit works by adding one bit to every byte of data, resulting in nine bits. (Remember that a byte is already eight bits.) The value of any given bit (1 or 0) is determined at the time that data is written to memory. Then, a 1 or 0 is assigned to the parity bit, depending on whether the overall byte is made up of an odd or even number of 1s. Figure 3.2 shows various bytes of data with their additional parity bit.

Figure 3.2 Odd and even parity.

In plain odd and even parity, every byte gets 1 parity bit attached, making a combined 9-bit byte. Therefore, a 16-bit byte has 2 parity bits, a 32-bit byte has 4 parity bits, and so forth. This produces extra pins on the memory module, and this is one of the reasons why various DIMMs and SIMMs have a different number of pins.

Even parity checking, is where the total of all the 1 bits in a byte must equal an even number. If five of the bits are set to 1, the parity bit will also be set to 1 to total six (an even number). If 6 bits were set to 1, the parity bit would be set to 0 to maintain the even number six. If the parity is set to "even" and a returning byte contains an odd number of "ones," the system knows the data is corrupted. This is called a parity error.

CAUTION

In even parity, the overall number of 1s must come out to an even number.

Odd parity works in the reverse of even parity, but the concept is the same. The total number of 1s in any given byte must come out to an odd number. Once again, this is done by using either a 1 or a 0 for the parity bit, as you can see in Figure 3.2.

CAUTION

You'll receive a parity error if the parity is odd and the parity circuit gets an even number, or if the parity is even and the parity circuit gets an odd number. The circuit can't correct the error, but it can detect that the data is wrong.

Fake or Disabled Parity

Some computer manufacturers install a less expensive "fake" parity chip that simply sends a 1 or a 0 to the parity circuit to supply parity on the basis of which parity state is expected. Regardless of whether the parity is valid, the computer is fooled into thinking that everything is valid. This method means no connection whatsoever exists between the parity bit being sent and the associated byte of data.

A more common way for manufacturers to reduce the cost of SIMMs is to simply disable the parity completely, or to build a computer without any parity checking capability installed. Some of today's PCs are being shipped this way, and they make no reference to the disabled or missing parity. The purchaser must ensure that the SIMMs have parity capabilities, and must configure the motherboard to turn parity on.

### Error Correction Code (ECC)

Parity checking is limited in the sense that it can only detect an error—it can't repair or correct the error. This is because the circuit can't tell which one of the eight bits is invalid. Additionally, if multiple bits are wrong but the result according to the parity is correct, the circuit will pass the invalid data as okay.

Error correction code (ECC) uses a special algorithm to work with the memory controller, and it adds an error correction code bit to each data bit when it's sent to memory. When the CPU calls for data, the memory controller decodes each error correction bit and determines the validity of its attached data bit.

The system requires twice the number of bits, but the benefit is that ECC can correct a single-bit error. Because approximately 90 percent of data errors are single-bit errors, ECC does a very good job. On the other hand, ECC costs a lot more, due to the additional number of bits.

CAUTION

Remember that ECC can correct only single-bit errors, but it can also detect multi-bit errors. Parity checking understands only that the overall byte coming out of memory doesn't match what was sent into memory. Parity checking cannot correct anything.

Usually, whoever is buying the computer will decide which type of data integrity checking they want, depending mainly on cost benefits. They can choose ECC, parity checking, or nothing. High-end computers (e.g., file servers) typically use an ECC-capable memory controller. Midrange desktop business computers typically are configured with parity checking. Low-cost home computers often have nonparity memory (no parity checking or "fake" parity).

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